The present invention generally relates to a noise reduction circuit, and in particular to a noise reduction circuit for effectively reducing noise components of a signal such as a video signal processed in a video tape recorder.
FIG. 1(A) is a systematic block diagram of a conventional noise reduction circuit (see the U.S. Pat. No. 4,563,704, for example). Referring to this figure, an input video signal a as shown in FIG. 2(A) which is applied to an input terminal 11 is fed to a high-pass filter 12, at which high frequency components b as shown in FIG. 2(B) are extracted from the video signal. A limiter 13 amplitude-limits the high frequency components passing through the high-pass filter 12. Then, the limiter 13 provides a subtractor 14 with the amplitude-limited high frequency component signal, or a noise component signal c as shown in FIG. 2(C) through a coefficient circuit 16 for giving the output of the limiter 13 a predetermined coefficient k (k is an arbitrary number). The subtractor 14 subtracts the noise component signal c from the video signal a and provides an output terminal 15 with an output signal d' as shown in FIG. 2(D) in which the noise components are reduced.
However, the conventional noise reduction circuit described above has a disadvantage in that partial signal loss is introduced in a rising part of the output signal d' changing from black level to white level, as indicated with P in FIG. 2(D). In addition, the conventional circuit has another disadvantage in that the noise components still remain at that rising part of the output signal d' as shown in FIG. 2(D).
FIG. 1(B) illustrates another conventional noise reduction circuit (see the above publication, for example). In this figure, the input signal applied to the terminal 11 is supplied to a low-pass filter 17 and a delay circuit 19. The latter delays the received signal by a predetermined time and provides subtractors 14 and 18 with the delayed input signal. The subtractor 18 subtractors an output signal of the low-pass filter 17 from an output signal of the delay circuit 19 and feeds a subtracted result through the limiter 13 to the subtractor 14. Then, the subtractor 14 subtracts the output signal of the limiter 13 from the output signal of the delay circuit 19, and supplies an output signal to the terminal 15.
Although the noise reduction circuit in FIG. 1(B) effectively reduces the noise components as compared with the circuit in FIG. 1(A), it still has a disadvantage in that signal loss is brought about at the rising part of the output signal changing from black level to white level at the terminal 15. This is mainly because subtraction between the output signal of the delay circuit 19 and the output signal of the limiter 13 which have the same phase and time relationship as each other is performed.